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f9488a8cf8 //SSE simd function for vectorized multiplication of 2 arrays with single-precision floating point numbers //1st param pointer on source/destination array, 2nd param 2. The Cray-1 normally had a performance of about 80 MFLOPS, but with up to three chains running it could peak at 240 MFLOPS a respectable number even as of 2002. This ratio depends on the efficiency of the compilation like adjacency of the elements in memory. Users simply program using these abstractions and an intelligent compiler chooses the best implementation based on the context.. Vector machines appeared in the early 1970s and dominated supercomputer design through the 1970s into the 1990s, notably the various Cray platforms. The example multiplies two arrays of single precision floating point numbers. The more complex instructions also add to the complexity of the decoders, which might slow down the decoding of the more common instructions such as normal adding.
For one, only two address translations are needed. See also. The Cray design used pipeline parallelism to implement vector instructions rather than multiple ALUs. The data for A, B and C could bein theory at leastencoded directly into the instruction. Some suggestions: Go back to the last page Go to the home page .. read instruction and decode it fetch these 10 numbers fetch those 10 numbers add them put the results here . In fact, vector processors work best only when there are large amounts of data to be worked on.